Data Sheet

112
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
z Bits 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 3:0 – ID[3:0]: Generic Clock Generator Selection
These bits select the generic clock generator that will be configured or read. The value of the ID bit group versus
which generic clock generator is configured is shown in Table 14-8.
A power reset will reset the GENCTRL register for all IDs, including the
generic clock generator used by the RTC. If a
generic clock generator ID other than generic clock generator 0 is not a source of a “locked” generic clock or a source of
the RTC generic clock, a user reset will reset the GENCTRL for this ID.
After a power reset, the reset value of the GENCTRL register is as shown in
Table 14-9.
Table 14-7. Source Select
Value Name Description
0x00 XOSC XOSC oscillator output
0x01 GCLKIN Generator input pad
0x02 GCLKGEN1 Generic clock generator 1 output
0x03 OSCULP32K OSCULP32K oscillator output
0x04 OSC32K OSC32K oscillator output
0x05 XOSC32K XOSC32K oscillator output
0x06 OSC8M OSC8M oscillator output
0x07 DFLL48M DFLL48M output
0x08 FDPLL96M FDPLL96M output
0x09-0x1F Reserved Reserved for future use
Table 14-8. Generic Clock Generator Selection
Value Name Description
0x0 GCLKGEN0 Generic clock generator 0
0x1 GCLKGEN1 Generic clock generator 1
0x2 GCLKGEN2 Generic clock generator 2
0x3 GCLKGEN3 Generic clock generator 3
0x4 GCLKGEN4 Generic clock generator 4
0x5 GCLKGEN5 Generic clock generator 5
0x6 GCLKGEN6 Generic clock generator 6
0x7 GCLKGEN7 Generic clock generator 7
0x8 GCLKGEN8 Generic clock generator 8
0x9-0xF Reserved