Data Sheet

106
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
14.8.3 Generic Clock Control
This register allows the user to configure one of the generic clocks, as specified in the CLKCTRL.ID bit group. To write to
the CLKCTRL register, do a 16-bit write with all configurations and the ID.
To read the CLKCTRL register, first do an 8-bit write to the CLKCTRL.ID bit group with the ID of the generic clock whose
configuration is to be read, and then read the CLKCTRL register.
Name: CLKCTRL
Offset: 0x2
Reset: 0x0000
Property: Write-Protected
z Bit 15 – WRTLOCK: Write Lock
When this bit is written, it will lock from further writes the generic clock pointed to by CLKCTRL.ID, the generic
clock generator pointed to in CLKCTRL.GEN and the division factor used in the generic clock generator. It can
only be unlocked by a power reset.
One exception to this is generic clock generator 0, which cannot be locked.
0: The generic clock and the associated generic clock generator and division factor are not locked.
1: The generic clock and the associated generic clock generator and division factor are locked.
z Bit 14 – CLKEN: Clock Enable
This bit is used to enable and disable a generic clock.
0: The generic clock is disabled.
1: The generic clock is enabled.
z Bits 13:12 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bits 11:8 – GEN[3:0]: Generic Clock Generator
Bit 151413121110 9 8
WRTLOCK CLKEN
GEN[3:0]
AccessR/WR/W R R R/WR/WR/WR/W
Reset00000000
Bit 76543210
ID[5:0]
Access R R R/W R/W R/W R/W R/W R/W
Reset00000000
Table 14-3. Generic Clock Generator
GEN[3:0] Name Description
0x0 GCLKGEN0 Generic clock generator 0
0x1 GCLKGEN1 Generic clock generator 1
0x2 GCLKGEN2 Generic clock generator 2
0x3 GCLKGEN3 Generic clock generator 3