Data Sheet

1036

Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181G–SAM-D21_Datasheet–09/2015

5 - If an input event triggered STOP action is performed at the same time as

the counter overflows, the first pulse width of the subsequent counter start

can be altered with one prescaled clock cycle. Errata reference: 12107

Fix/Workaround:

None

6 - When the RUNSTDBY bit is written after the TCC is enabled, the

respective TCC APB bus is stalled and the RUNDSTBY bit in the TCC CTRLA

Fix/Workaround:

None.

7 - TCC fault filtering on inverted fault is not working. Errata reference:

12512

Fix/Workaround:

Use only non-inverted faults.

8 - When waking up from the STANDBY power save mode, the

SYNCBUSY.CTRLB and SYNCBUSY.STATUS bits may be locked to 1. Errata

reference: 12227

Fix/Workaround:

After waking up from STANDBY power save mode, perform a software reset of

the TCC if you are using the SYNCBUSY.CTRLB and SYNCBUSY.STATUS bits

9 - When the Peripheral Access Controller (PAC) protection is enabled,

writing to WAVE or WAVEB registers will not cause a hardware exception.

Errata reference: 11468

Fix/Workaround:

None

10 - If the MCx flag in the INTFLAG register is set when enabling the DMA,

this will trigger an immediate DMA transfer and overwrite the current

buffered value in the TCC register. Errata reference: 12155

Fix/Workaround:

None

39.1.2.10 PTC

1 - WCOMP interrupt flag is not stable. The WCOMP interrupt flag will not

always be set as described in the datasheet. Errata reference: 12860

Fix/Workaround:

Do not use the WCOMP interrupt. Use the WCOMP event.