Data Sheet

1025
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
2 - If the DFLL48M reaches the maximum or minimum COARSE or FINE
calibration values during the locking sequence, an out of bounds interrupt
will be generated. These interrupts will be generated even if the final
calibration values at DFLL48M lock are not at maximum or minimum, and
might therefore be false out of bounds interrupts. Errata reference: 10669
Fix/Workaround:
Check that the lockbits: DFLLLCKC and DFLLLCKF in the SYSCTRL Interrupt
Flag Status and Clear register (INTFLAG) are both set before enabling the
DFLLOOB interrupt.
3 - The DFLL status bits in the PCLKSR register during the USB clock
recovery mode can be wrong after a USB suspend state. Errata reference:
11938
Fix/Workaround:
Do not monitor the DFLL status bits in the PCLKSR register during the USB clock
recovery mode.
39.1.1.5 FDPLL
1 - The lock flag (DPLLSTATUS.LOCK) may clear randomly. When the lock
flag randomly clears, DPLLLCKR and DPLLLCKF interrupts will also trigger,
and the DPLL output is masked. Errata reference: 11791
Fix/Workaround:
Set DPLLCTRLB.LBYPASS to 1 to disable masking of the DPLL output by the
lock status.
2 - FDPLL lock time-out values are different from the parameters in the
datasheet. Errata reference: 12145
Fix/Workaround:
The time-out values are:
- DPLLCTRLB.LTIME[2:0] = 4 : 10ms
- DPLLCTRLB.LTIME[2:0] = 5 : 10ms
- DPLLCTRLB.LTIME[2:0] = 6 : 11ms
- DPLLCTRLB.LTIME[2:0] = 7 : 11ms
39.1.1.6 NVMCTRL
1 - Default value of MANW in NVM.CTRLB is 0. Errata reference: 13134
This can lead to spurious writes to the NVM if a data write is done through a
pointer with a wrong address corresponding to NVM area.
Fix/Workaround:
Set MANW in the NVM.CTRLB to 1 at startup