Data Sheet

Block diagram and pin description LIS3DH
8/42 Doc ID 17530 Rev 1
1 Block diagram and pin description
1.1 Block diagram
Figure 1. Block diagram
1.2 Pin description
Figure 2. Pin connection
CHARGE
AMPLIFIER
Y+
Z+
Y-
Z-
a
X+
X-
I2C
SPI
CS
SCL/SPC
SDA/SDO/SDI
SDO/SA0
CONTROL LOGIC
&
INTERRUPT GEN.
INT 1
CLOCK
TRIMMING
CIRCUITS
REFERENCESELF TEST
CONTROL
A/D
CONVERTER 1
INT 2
MUX
96 Level
FIFO
ADC1 - ADC Input1
ADC2 - ADC Input2
ADC3 - ADC Input3
A/D
CONVERTER 2
LOGIC
TEMPERATURE
SENSOR
(TOP VIEW)
DIRECTION OF THE
DETECTABLE
ACCELERATIONS
1
5
9
13
(BOTTOM VIEW)
Y
1
X
Z
Pin 1 indicator
Vdd_IO
NC
NC
SC L/SPC
GND
SDA/SDI/SDO
CS
SDO/SA0
ADC3
GND
INT1
RES
INT2
ADC1 Vdd ADC2