User's Manual

Confidential
INTERFACE DESCRIPT
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1/155 19-KRD 104 1025 Uen PA4
2.2 Functional Block Diagram
A function representation of the EDGE duaghter card is included in the figure below.
Figure 2.2-1 EDGE Daughter Card Functional Block Diagram
CACHE
Arbiter
DMA
Bridge
JTAG
Interrupt
Control
Boot
ROM
Shared
Memory
External
Memory
Power
Mngmt
Channel
Coding
Bridge
XRAM
DROM
YRAM
PROM
PRAM
ARM926EJTeakLite
DSP
Interrupt
Control
A5
Encrypt
Equalizer
Viterbi
Accel
Power
Control
TX/RX
State
Machine
GSM
Timer
RF
Serial
Port
Burst
Buffer
AGC
Register
AGC
DAC
32kHz
XTAL
13MHz
VCXO
PROCESSOR BUS
90°
:4 :4 :2
PLL
Burst
Buffer
AFC
Register
PGA
D-S
ADC
Mod
MOD
DAC
AFC
DAC
90° 90°
90°
:2
PA
DAC
PA
RAM
SIM
USB
GPIO
MEMORY
VOLTAGE REGULATORS
OV &
SCCT
PROTECTION
SYSTEM CONNECTOR
POWER USB LED
VPA
SIM INTERFACE
LEVEL
SHIFTER
POWER STATUS
LOOP FILTER
RX SAW
FILTERS
bias
PA limiter
BALUN
DRIVER
SWITCH
fixed VAPC
VPA
ANT SWITCH
BASEBAND ASIC
RF TRANSCEIVER ASIC
ANTENNA
CONNECTOR
EDGE MODULE
DAUGHTER CARD
UART
UART
TEST INTERFACE
PLL
fixed VAPC
SWITCHING
REGULATOR
VOLT
REG
Serial
Control
RI
CACHE
Arbiter
DMA
Bridge
JTAG
Interrupt
Control
Boot
ROM
Shared
Memory
External
Memory
Power
Mngmt
Channel
Coding
Bridge
XRAM
DROM
YRAM
PROM
PRAM
ARM926EJTeakLite
DSP
Interrupt
Control
A5
Encrypt
Equalizer
Viterbi
Accel
Power
Control
TX/RX
State
Machine
GSM
Timer
RF
Serial
Port
Burst
Buffer
AGC
Register
AGC
DAC
32kHz
XTAL
13MHz
VCXO
PROCESSOR BUS
90°
:4 :4 :2
PLL
Burst
Buffer
AFC
Register
PGA
D-S
ADC
D-S
ADC
Mod
MOD
DAC
MOD
DAC
AFC
DAC
AFC
DAC
90° 90°
90°
:2
PA
DAC
PA
DAC
PA
RAM
SIM
USB
GPIO
MEMORY
VOLTAGE REGULATORS
OV &
SCCT
PROTECTION
SYSTEM CONNECTOR
POWER USB LED
VPA
SIM INTERFACE
LEVEL
SHIFTER
POWER STATUS
LOOP FILTER
RX SAW
FILTERS
bias
PA limiter
BALUN
DRIVER
SWITCH
fixed VAPC
VPA
ANT SWITCH
BASEBAND ASIC
RF TRANSCEIVER ASIC
ANTENNA
CONNECTOR
EDGE MODULE
DAUGHTER CARD
UART
UART
TEST INTERFACE
PLL
fixed VAPC
SWITCHING
REGULATOR
VOLT
REG
Serial
Control
RI