User's Manual

[2006/11/08 11:11:0] [BTS boot] ==> Download file :fpga_L2.out fini
shed
[2006/11/08 11:11:0] [BTS boot] ==> Download file :fpga_L1.out fini
shed
[2006/11/08 11:11:0] [BTS boot] ==> Download file :fpga_FEP0.out fi
nished
[2006/11/08 11:11:0] [BTS boot] ==> Download file :fpga_FEP1.out fi
nished
Download booting file is now completed.
[2006/11/08 11:11:0] [BTS boot] ==> FPGA download started
[2006/11/08 11:11:0] [BTS boot] ==> FPGA download succeed
[2006/11/08 11:11:0] [BTS boot] ==> Reset FPGA
Start the FPGA circuit module.
[2006/11/08 11:11:0] [BTS boot] ==> Reset AUX ：Start AUX cir
cuit module.
[2006/11/08 11:11:0] [BTS boot] ==> Reset L2 PowerPC system
[2006/11/08 11:11:0] [BTS boot] ==> L2 PreLoader is ready to accept
L2 Image
[2006/11/08 11:11:0] [BTS boot] ==> L2 PPC image download finished
[2006/11/08 11:11:0] L2 PCI interface is ready for message exchange
[2006/11/08 11:11:0] [tSys] BTS L2 boot up SUCCESS
BTS L2 boot is now completed
[2006/11/08 11:11:0] [BTS boot] ==> MCP 0 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> MCP 1 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> MCP 2 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> MCP 3 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> MCP 4 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> MCP 5 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> MCP 6 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> MCP 7 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> AUX Reset, start AUX code
download
[2006/11/08 11:11:0] [tSys] BTS MCP[0] boot up SUCCESS
[2006/11/08 11:11:0] [tSys] BTS MCP[1] boot up SUCCESS
[2006/11/08 11:11:0] [tSys] BTS MCP[2] boot up SUCCESS
[2006/11/08 11:11:0] [tCpeM] receive msg[0x3706] from task[57]
[2006/11/08 11:11:0] [tSys] BTS MCP[3] boot up SUCCESS
[2006/11/08 11:11:0] [tSys] BTS MCP[4] boot up SUCCESS
[2006/11/08 11:11:0] [tSys] BTS MCP[5] boot up SUCCESS
[2006/11/08 11:11:0] [tSys] BTS MCP[6] boot up SUCCESS
[2006/11/08 11:11:0] [tSys] BTS MCP[7] boot up SUCCESS
MSP circuit module boot is now completed
[2006/11/08 11:11:0] [tSys] BTS AUX boot up SUCCESS
[2006/11/08 11:11:0] [BTS boot] ==> Reset FEP 0
[2006/11/08 11:11:0] [BTS boot] ==> Reset FEP 1
[2006/11/08 11:11:0] [BTS boot] ==> FEP 0 reset, start code download
[2006/11/08 11:11:0] [BTS boot] ==> FEP 1 reset, start code download
[2006/11/08 11:11:0] [tSys] BTS FEP[0] boot up SUCCESS
[2006/11/08 11:11:0] [tSys] BTS FEP[1] boot up SUCCESS