- Standard Microsystems Hi-Speed USB Device Specification Sheet

Hi-Speed USB Device PHY with UTMI Interface

Datasheet

Revision 1.5 (11-15-07) 26 SMSC USB3280

DATASHEET

7.6 USB 2.0 Transceiver

The SMSC Hi-Speed USB 2.0 Transceiver consists of the High Speed and Full Speed Transceivers,

and the Termination resistors.

7.6.1 High Speed and Full Speed Transceivers

The USB3280 transceiver meets all requirements in the USB 2.0 specification.

The receivers connect directly to the USB cable. This block contains a separate differential receiver

for HS and FS mode. Depending on the mode, the selected receiver provides the serial data stream

through the multiplexer to the RX Logic block. The FS mode section of the FS/HS RX block also

consists of a single-ended receiver on each of the data lines to determine the correct FS linestate. For

HS mode support, the FS/HS RX block contains a squelch circuit to insure that noise is never

interpreted as data.

The transmitters connect directly to the USB cable. The block contains a separate differential FS and

HS transmitter which receive encoded, bit stuffed, serialized data from the TX Logic block and transmit

it on the USB cable.

7.6.2 Termination Resistors

The USB3280 transceiver fully integrates all of the USB termination resistors. The USB3280 includes

the 1.5kΩ pull-up resistor on DP. In addition the 45Ω high speed termination resistors are also

integrated. These integrated resistors require no tuning or trimming. The state of the resistors is

determined by the operating mode of the PHY. The possible valid resistor combinations are shown in

Table 7.1.

 RPU_DP_EN activates the 1.5kΩ DP pull-up resistor

 HSTERM_EN activates the 45Ω DP and DM high speed termination resistors

Table 7.1 DP/DM Termination vs. Signaling Mode

SIGNALING MODE

UTMI+ INTERFACE SETTINGS

RESISTOR

SETTINGS

XCVRSELECT

TERMSELECT

OPMODE[1:0]

RPU_DP_EN

HSTERM_EN

Tri-State Drivers Xb Xb 01b 0b 0b

Power-up 1b 0b 00b 0b 0b

Peripheral Chirp 0b 1b 10b 1b 0b

Peripheral HS 0b 0b 00b 0b 1b

Peripheral FS 1b 1b 00b 1b 0b

Peripheral HS/FS Suspend 1b 1b 00b 1b 0b

Peripheral HS/FS Resume 1b 1b 10b 1b 0b

Peripheral Test J/Test K 0b 0b 10b 0b 1b