- Standard Microsystems Ethernet Single Chip Product Manual

10/100 Non-PCI Ethernet Single Chip MAC + PHY

Datasheet

Revision 1.91 (08-18-08) 92 SMSC LAN91C111 REV C

DATASHEET

MEMORY PARTITIONING

Unlike other controllers, the LAN91C111 does not require a fixed memory partitioning between transmit

and receive resources. The MMU allocates and de-allocates memory upon different events. An

additional mechanism allows the CPU to prevent the receive process from starving the transmit

memory allocation.

Memory is always requested by the side that needs to write into it, that is: the CPU for transmit or the

MAC for receive. The CPU can control the number of bytes it requests for transmit but it cannot

determine the number of bytes the receive process is going to demand. Furthermore, the receive

process requests will be dependent on network traffic, in particular on the arrival of broadcast and

Figure 10.5 Drive Send and Allocate Routines

ALLOCATE

Issue "Allocate Memory"

Command to MMU

Read Interrupt Status Register

Enqueue Packet

Set "Ready for Packet" Flag

Return

Copy Remaining TX Data

Packet into RAM

Return Buffers to Upper Layer

Write Allocated Packet into

Packet # Register

Write Address Pointer Register

Copy Part of TX Data Packet

into RAM

Write Source Address into

Proper Location

Store Data Buffer Pointer

Clear "Ready for Packet" Flag

Enable Allocation Interrupt

Allocation

Passed?

Ye s N o

DRIVER SEND

Choose Bank Select

Call ALLOCATE

Exit Driver Send

Read Allocation Result