AT42QT2120 Datasheet
Table Of Contents
- Features
- 1. Pinouts and Schematics
- 2. Overview
- 3. Wiring and Parts
- 4. I2C-compatible Communications (Comms Mode Only)
- 5. Setups
- 5.1 Introduction
- 5.2 Address 0: Chip ID
- 5.3 Address 1: Firmware Version
- 5.4 Address 2: Detection Status
- 5.5 Addresses 3 – 4: Key Status
- 5.6 Address 5: Slider Position
- 5.7 Address 6: Calibrate
- 5.8 Address 7: Reset
- 5.9 Address 8: Low Power (LP) Mode
- 5.10 Address 9 – 10: Toward Touch and Away from Touch Drift (TTD, ATD)
- 5.11 Address 11: Detection Integrator (DI)
- 5.12 Address 12: Touch Recal Delay (TRD)
- 5.13 Address 13: Drift Hold Time (DHT)
- 5.14 Address 14: Slider Options
- 5.15 Address 15: Charge Time
- 5.16 Address 16 – 27: Detect Threshold (DTHR)
- 5.17 Addresses 28 – 39: Key Control
- 5.18 Addresses 40 – 51: Pulse/Scale for Keys
- 5.19 Address 52 – 75: Key Signal
- 5.20 Address 76 – 99: Reference Data
- 6. Specifications
- Appendix A. I2C-compatible Operation
- Associated Documents
- Revision History
9
9634E–AT42–06/12
AT42QT2120
2.3 Keys
Dependent on mode, the QT2120 can have a minimum of one key and a maximum of 12 keys.
These can be constructed in different shapes and sizes. See “Features” on page 1 for the
recommended dimensions.
The possible combinations of keys are:
Comms mode:
• 1 to 12 keys
or
• 1 to 9 keys plus 1 slider/wheel
• Key channels 2 to 11 can be reassigned as general outputs, if required
Note: Any number of keys can be configured as proximity channels.
Standalone mode:
• 1 to 5 keys plus corresponding discrete outputs
• 1 Guard Channel
• 1 Proximity sensor
Unused keys should be disabled by setting bit 0 of their control bytes to 1 (see Section 5.17 on
page 26).
The Key Status register (see Section 5.5 on page 21) can be read to determine the touch status
of the corresponding key. It is recommended using the open-drain CHANGE
line to detect when
a change of status has occurred.
2.4 Output Lines
In comms mode some pins, normally used for touch keys, can be used as output pins. If the Key
Control bit 0 (EN) is set to 1, the pin can be used as an output. The state of the pin is then
controlled by Key Control bit 1 (GPO).
In Standalone mode pins OUT2 to OUT6 are driven by KEY2 to KEY6 respectively. The OUT
pins drive high during touch and can be used to drive, for example, LEDs.
2.5 Acquisition/Low Power Mode (LP)
There are 255 different acquisition times possible. These are controlled via the LP Mode byte
(see Section 5.9 on page 22) which can be written to via I
2
C-compatible communication.
LP mode controls the intervals between acquisition measurements. Longer intervals consume
lower power but have an increased response time. During calibration, touch and during the
detect integrator (DI) period, the LP mode is temporarily set to LP mode 1 for a faster response.
The QT2120 operation is based on a fixed cycle time of approximately 16 ms. The LP mode
setting indicates how many of these periods exist per measurement cycle. For example, If LP
mode = 1, there is an acquisition every cycle (16 ms). If LP mode = 3, there is an acquisition
every 3 cycles (48 ms). If a high PULSE setting is selected then the acquisition time may exceed
16 ms.
An LP setting of 0 will send the device into Power-down mode. To wake the device from this
mode a nonzero LP setting should be written to the LP address at location 8.