AT42QT2120 Datasheet
Table Of Contents
- Features
- 1. Pinouts and Schematics
- 2. Overview
- 3. Wiring and Parts
- 4. I2C-compatible Communications (Comms Mode Only)
- 5. Setups
- 5.1 Introduction
- 5.2 Address 0: Chip ID
- 5.3 Address 1: Firmware Version
- 5.4 Address 2: Detection Status
- 5.5 Addresses 3 – 4: Key Status
- 5.6 Address 5: Slider Position
- 5.7 Address 6: Calibrate
- 5.8 Address 7: Reset
- 5.9 Address 8: Low Power (LP) Mode
- 5.10 Address 9 – 10: Toward Touch and Away from Touch Drift (TTD, ATD)
- 5.11 Address 11: Detection Integrator (DI)
- 5.12 Address 12: Touch Recal Delay (TRD)
- 5.13 Address 13: Drift Hold Time (DHT)
- 5.14 Address 14: Slider Options
- 5.15 Address 15: Charge Time
- 5.16 Address 16 – 27: Detect Threshold (DTHR)
- 5.17 Addresses 28 – 39: Key Control
- 5.18 Addresses 40 – 51: Pulse/Scale for Keys
- 5.19 Address 52 – 75: Key Signal
- 5.20 Address 76 – 99: Reference Data
- 6. Specifications
- Appendix A. I2C-compatible Operation
- Associated Documents
- Revision History
32
9634E–AT42–06/12
AT42QT2120
6.5 Power Consumption
6.5.1 1 Channel Enabled
Figure 6-1. Idd Curve with 1 Channel Enabled
Table 6-1. Power Consumption (µA)
LP Mode 5V 4.2V 3.6V 3.3V 3V 2.5V 2V 1.8V
0 <1 <1 <1 <1 <1 <1 <1 <1
1 910 720 590 530 475 385 310 280
2 790 625 515 465 420 340 280 255
3 750 595 490 445 400 330 265 245
4 730 580 480 430 390 320 260 240
5 720 570 460 415 385 315 255 235
255 670 535 445 405 360 300 245 225
Pulse = 0 and Scale = 0
0
100
200
300
400
500
600
700
800
900
1000
012345255
Current (uA)
LP Mode
Vdd = 5 V Vdd = 4.2 V Vdd = 3.6 V
Vdd = 3.3 V Vdd = 3.0 V Vdd = 2.5 V
Vdd = 2 V Vdd = 1.8 V