ina219 datasheet

Table Of Contents

INA219

www.ti.com

SBOS448G –AUGUST 2008–REVISED DECEMBER 2015

8.6.2 Register Details

All INA219 16-bit registers are actually two 8-bit bytes through the I

C interface.

8.6.2.1 Configuration Register (address = 00h) [reset = 399Fh]

Figure 19. Configuration Register

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

BADC BADC BADC BADC SADC SADC SADC SADC MODE MODE MODE

RST — BRNG PG1 PG0

4 3 2 1 4 3 2 1 3 2 1

R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-0 R/W-0 R/W-1 R/W-1 R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 3. Bit Descriptions

RST: Reset Bit

Bit 15 Setting this bit to '1' generates a system reset that is the same as power-on reset. Resets all registers to default

values; this bit self-clears.

BRNG: Bus Voltage Range

Bit 13 0 = 16V FSR

1 = 32V FSR (default value)

PG: PGA (Shunt Voltage Only)

Bits 11, 12 Sets PGA gain and range. Note that the PGA defaults to ÷8 (320mV range). Table 4 shows the gain and range for

the various product gain settings.

Table 4. PG Bit Settings

(1)

PG1 PG0 GAIN Range

0 0 1 ±40 mV

0 1 /2 ±80 mV

1 0 /4 ±160 mV

1 1 /8 ±320 mV

(1) Shaded values are default.

BADC: BADC Bus ADC Resolution/Averaging

Bits 7–10 These bits adjust the Bus ADC resolution (9-, 10-, 11-, or 12-bit) or set the number of samples used when

averaging results for the Bus Voltage Register (02h).

Product Folder Links: INA219