ina219 datasheet
Table Of Contents
- 1 Features
- 2 Applications
- 3 Description
- Table of Contents
- 4 Revision History
- 5 Related Products
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6 Register Maps
- 9 Application and Implementation
- 10 Power Supply Recommendations
- 11 Layout
- 12 Device and Documentation Support
- 13 Mechanical, Packaging, and Orderable Information
Frame 1 Two-Wire Slave Address Byte
(1)
Frame 2 Data MSByte
(2)
1
Start By
Master
ACK By
INA219
ACK By
Master
From
INA219
1 9 1
9
SDA
SCL
0 0 A3 R/
W D15 D14 D13 D12 D11 D10 D9 D8
A2 A1 A0
Frame 3 Data LSByte
(2)
StopNoACK By
(3)
Master
From
INA219
1
9
D7 D6 D5 D4 D3 D2 D1 D0
NOTES: (1) The value of the Slave Address Byte is determined by the settings of the A0 and A1 pins.
Refer to Table 1.
(2) Read data is from the last register pointer location. If a new register is desired, the register
pointer must be updated. See Figure 19.
(3) ACK by Master can also be sent.
Frame 1 Two-Wire Slave Address Byte
(1)
Frame 2 Register Pointer Byte
Start By
Master
ACK By
INA219
ACK By
INA219
1 9 1
ACK By
INA219
1
D15 D14 D13 D12 D11 D10 D9 D8
9
9
SDA
SCL
1 0 0 A3 A2
A1 A0 R/W P7 P6 P5 P4 P3 P2 P1 P0
NOTE (1): The value of the Slave Address Byte is determined by the settings of the A0 and A1 pins. Refer to Table 1.
Frame 4 Data LSByteFrame 3 Data MSByte
ACK By
INA219
Stop By
Master
1
D7 D6 D5 D4 D3 D2 D1 D0
9
INA219
SBOS448G –AUGUST 2008–REVISED DECEMBER 2015
www.ti.com
Figure 15. Timing Diagram for Write Word Format
Figure 16. Timing Diagram for Read Word Format
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