bmp280 datasheet
Table Of Contents
- 1. Specification
- 2. Absolute maximum ratings
- 3. Functional description
- 4. Global memory map and register description
- 5. Digital interfaces
- 6. Pin-out and connection diagram
- 7. Package, reel and environment
- 8. Appendix 1: Computation formulae for 32 bit systems
- 9. Legal disclaimer
- 10. Document history and modification
Bosch
Sensortec | BMP280 Data sheet
32 |
48
Modifications reserved | Data subject to change without notice
Document number: BST-BMP280-DS001-23 Revision_1.23_11202
0
t
HDDAT
t
f
t
BUF
SDI
SCK
SDI
t
LOW
t
HDSTA
t
r
t
SUSTA
t
HIGH
t
SUDAT
t
SUSTO
Figure 12: I²C timing diagram
Table 27: I²C timings
Parameter Symbol Condition Min Typ Max Units
SDI setup time
t
SU;DAT
S&F Mode
HS mode
160
30
ns
ns
SDI hold time
t
HD;DAT
S&F Mode, Cb≤100 pF
S&F Mode, Cb≤400 pF
HS mode, Cb≤100 pF
HS mode, Cb≤400 pF
80
90
18
24
115
150
ns
ns
ns
ns
SCK low pulse
t
LOW
HS mode, Cb≤100 pF
V
DDIO
= 1.62 V
160
ns
SCK low pulse t
LOW
HS mode, Cb≤100 pF
V
DDIO
= 1.2 V
210 ns
The above-mentioned I2C specific timings correspond to the following internal added delays:
• Input delay between SDI and SCK inputs: SDI is more delayed than SCK by typically
100 ns in Standard and Fast Modes and by typically 20 ns in High Speed Mode.
• Output delay from SCK falling edge to SDI output propagation is typically 140 ns in
Standard and Fast Modes and typically 70 ns in High Speed Mode.
5.4.3 SPI timings
The SPI timing diagram is in Figure 13, while the corresponding values are given in Table 28. All
timings apply both to 4- and 3-wire SPI.










