pca9306 datasheet
Table Of Contents
- 1 Features
- 2 Applications
- 3 Description
- Table of Contents
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Switching Characteristics AC Performance (Translating Down) (EN = 3.3 V)
- 6.7 Switching Characteristics AC Performance (Translating Down) (EN = 2.5 V)
- 6.8 Switching Characteristics AC Performance (Translating Up) (EN = 3.3 V)
- 6.9 Switching Characteristics AC Performance (Translating Up) (EN = 2.5 V)
- 6.10 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 8.1 Overview
- 8.1.1 Definition of threshold voltage
- 8.1.2 Correct Device Set Up
- 8.1.3 Disconnecting a Slave from the Main I2C Bus Using the EN Pin
- 8.1.4 Supporting Remote Board Insertion to Backplane with PCA9306
- 8.1.5 Switch Configuration
- 8.1.6 Master on Side 1 or Side 2 of Device
- 8.1.7 LDO and PCA9306 Concerns
- 8.1.8 Current Limiting Resistance on VREF2
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4 Device Functional Modes
- 8.1 Overview
- 9 Application and Implementation
- 10 Power Supply Recommendations
- 11 Layout
- 12 Device and Documentation Support
- 13 Mechanical, Packaging, and Orderable Information
5
PCA9306
www.ti.com
SCPS113M –OCTOBER 2004–REVISED APRIL 2019
Product Folder Links: PCA9306
Submit Documentation FeedbackCopyright © 2004–2019, Texas Instruments Incorporated
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and input/output negative voltage ratings may be exceeded if the input and output current ratings are observed.
6 Specifications
6.1 Absolute Maximum Ratings
(1)
over operating ambient temperature range (unless otherwise noted)
MIN MAX UNIT
V
REF1
DC reference voltage range –0.5 7 V
V
REF2
DC reference bias voltage range –0.5 7 V
V
I
Input voltage range
(2)
–0.5 7 V
V
I/O
Input/output voltage range
(2)
–0.5 7 V
Continuous channel current 128 mA
I
IK
Input clamp current V
I
< 0 –50 mA
T
j(max)
Maximum junction temperature 125 °C
T
stg
Storage temperature range –65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
(1)
±2000
V
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins
(2)
±1000
(1) To support translation, V
REF1
supports 1.2 V to V
REF2
- 0.6 V. V
REF2
must be between V
REF1
+ 0.6 V to 5.5 V. See Typical Application
for more information.
6.3 Recommended Operating Conditions
MIN MAX UNIT
V
I/O
Input/output voltage SCL1, SDA1, SCL2, SDA2 0 5.5 V
V
REF1
(1)
Reference voltage 0 5.5 V
V
REF2
(1)
Reference voltage 0 5.5 V
EN Enable input voltage 0 5.5 V
I
PASS
Pass switch current 64 mA
T
A
Operating ambient temperature –40 85 °C
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information
THERMAL METRIC
(1)
PCA9306
UNITDCT DCU DQE YZT
8 PINS 8 PINS 8 PINS 8 PINS
R
θJA
Junction-to-ambient thermal resistance 189.6 210.1 246.5 125.5 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 119.6 81.9 149.1 1 °C/W
R
θJB
Junction-to-board thermal resistance 102.1 88.8 100 62.7 °C/W
ψ
JT
Junction-to-top characterization parameter 44.5 8.3 17.1 3.4 °C/W
ψ
JB
Junction-to-board characterization parameter 101 88.4 99.8 62.7 °C/W










