pca9306 datasheet

19
PCA9306
www.ti.com SCPS113M –OCTOBER 2004–REVISED APRIL 2019
Product Folder Links: PCA9306
Submit Documentation FeedbackCopyright © 2004–2019, Texas Instruments Incorporated
10 Power Supply Recommendations
For supplying power to the PCA9306 device, the V
REF1
pin can be connected directly to a power supply. The
V
REF2
pin must be connected to the V
DPU
power supply through a 200-kΩ resistor. Failure to have a high-
impedance resistor between V
REF2
and V
DPU
results in excessive current draw and unreliable device operation. It
is also worth noting, that in order to support voltage translation, the PCA9306 must have the EN and VREF2 pins
shorted and then pulled up to V
DPU
through a high-impedance resistor.
11 Layout
11.1 Layout Guidelines
For printed-circuit board (PCB) layout of the PCA9306 device, common PCB layout practices should be followed,
but additional concerns related to high-speed data transfer such as matched impedances and differential pairs
are not a concern for I
2
C signal speeds.
In all PCB layouts, it is a best practice to avoid right angles in signal traces, to fan out signal traces away from
each other on leaving the vicinity of an integrated circuit (IC), and to use thicker trace widths to carry higher
amounts of current that commonly pass through power and ground traces. The 100-pF filter capacitor should be
placed as close to V
REF2
as possible. A larger decoupling capacitor can also be used, but a longer time constant
of two capacitors and the 200-kΩ resistor results in longer turnon and turnoff times for the PCA9306 device.
These best practices are shown in Figure 20.
For the layout example provided in Figure 20, it would be possible to fabricate a PCB with only two layers by
using the top layer for signal routing and the bottom layer as a split plane for power (V
CC
) and ground (GND).
However, a four-layer board is preferable for boards with higher-density signal routing. On a four-layer PCB, it is
common to route signals on the top and bottom layer, dedicate one internal layer to a ground plane, and dedicate
the other internal layer to a power plane. In a board layout using planes or split planes for power and ground,
vias are placed directly next to the surface-mount component pad, which must attach to V
CC
or GND, and the via
is connected electrically to the internal layer or the other side of the board. Vias are also used when a signal
trace must be routed to the opposite side of the board, but this technique is not demonstrated in Figure 20.
11.2 Layout Example
Figure 20. PCA9306 Layout Example