pca9306 datasheet

C
b
(pF)
R
p(max)
(kOhm)
0 50 100 150 200 250 300 350 400 450
0
5
10
15
20
25
D008
Standard-mode
Fast-mode
VDPUX < 2 V
VDPUX > 2 V
18
PCA9306
SCPS113M –OCTOBER 2004–REVISED APRIL 2019 www.ti.com
Product Folder Links: PCA9306
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9.2.2.3 PCA9306 Bandwidth
The maximum frequency of the PCA9306 device depends on the application. The device can operate at speeds
of > 100 MHz given the correct conditions. The maximum frequency is dependent upon the loading of the
application.
Figure 3 shows a bandwidth measurement of the PCA9306 device using a two-port network analyzer.
However, this is an analog type of measurement. For digital applications, the signal should not degrade up to the
fifth harmonic of the digital signal. As a rule of thumb, the frequency bandwidth should be at least five times the
maximum digital clock rate. This component of the signal is very important in determining the overall shape of the
digital signal. In the case of the PCA9306 device, digital clock frequency of >100 MHz can be achieved.
The PCA9306 device does not provide any drive capability like the PCA9515 or PCA9517 series of devices.
Therefore, higher-frequency applications require higher drive strength from the host side. No pullup resistor is
needed on the host side (3.3 V) if the PCA9306 device is being driven by standard CMOS push-pull output
driver. Ideally, it is best to minimize the trace length from the PCA9306 device on the sink side (1.8 V) to
minimize signal degradation.
You can then use a simple formula to compute the maximum practical frequency component or the knee
frequency (f
knee
). All fast edges have an infinite spectrum of frequency components. However, there is an
inflection (or knee) in the frequency spectrum of fast edges where frequency components higher than f
knee
are
insignificant in determining the shape of the signal.
To calculate f
knee
:
f
knee
= 0.5 / RT (10%–90%) (7)
f
knee
= 0.4 / RT (20%–80%) (8)
For signals with rise-time characteristics based on 10- to 90-percent thresholds, f
knee
is equal to 0.5 divided by
the rise time of the signal. For signals with rise-time characteristics based on 20- to 80-percent thresholds, which
is very common in many current device specifications, f
knee
is equal to 0.4 divided by the rise time of the signal.
Some guidelines to follow that help maximize the performance of the device:
• Keep trace length to a minimum by placing the PCA9306 device close to the I
2
C output of the processor.
• The trace length should be less than half the time of flight to reduce ringing and line reflections or non-
monotonic behavior in the switching region.
• To reduce overshoots, a pullup resistor can be added on the 1.8 V side; be aware that a slower fall time is to
be expected.
9.2.3 Application Curve
Standard mode Fast mode
(f
SCL
= 100 kHz, t
r
= 1 μs) (f
SCL
= 400 kHz, t
r
= 300 ns)
Figure 18. Maximum Pullup Resistance (R
p(max)
) vs Bus
Capacitance (C
b
)
V
OL
= 0.2 x V
DPUX
, I
OL
= 2 mA when V
DPUX
≤ 2 V
V
OL
= 0.4 V, I
OL
= 3 mA when V
DPUX
> 2 V
Figure 19. Minimum Pullup Resistance (R
p(min)
) vs Pullup
Reference Voltage (V
DPUX
)