pca9306 datasheet
Table Of Contents
- 1 Features
- 2 Applications
- 3 Description
- Table of Contents
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Switching Characteristics AC Performance (Translating Down) (EN = 3.3 V)
- 6.7 Switching Characteristics AC Performance (Translating Down) (EN = 2.5 V)
- 6.8 Switching Characteristics AC Performance (Translating Up) (EN = 3.3 V)
- 6.9 Switching Characteristics AC Performance (Translating Up) (EN = 2.5 V)
- 6.10 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 8.1 Overview
- 8.1.1 Definition of threshold voltage
- 8.1.2 Correct Device Set Up
- 8.1.3 Disconnecting a Slave from the Main I2C Bus Using the EN Pin
- 8.1.4 Supporting Remote Board Insertion to Backplane with PCA9306
- 8.1.5 Switch Configuration
- 8.1.6 Master on Side 1 or Side 2 of Device
- 8.1.7 LDO and PCA9306 Concerns
- 8.1.8 Current Limiting Resistance on VREF2
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4 Device Functional Modes
- 8.1 Overview
- 9 Application and Implementation
- 10 Power Supply Recommendations
- 11 Layout
- 12 Device and Documentation Support
- 13 Mechanical, Packaging, and Orderable Information
SDA1
V
REF1
= 1.8 V
V
DPU
= 3.3 V
I
2
C Bus
Master
PCA9306
I
2
C Bus
Device
1
2
3
4
5
6
7
8
SCL1
SCL2
SDA2
V
REF1
V
REF2
EN
R
PU
R
PU
200 kΩ
V
CC
SDA
SCL
SW
SW
SCL
SDA
V
CC
R
PU
R
PU
GND
GND
GND
3.3-V Enable Signal
Off
On
17
PCA9306
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SCPS113M –OCTOBER 2004–REVISED APRIL 2019
Product Folder Links: PCA9306
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Typical Application (continued)
(1) All typical values are at T
A
= 25°C.
Figure 17. Typical Application Circuit (Switch Enable Control)
9.2.1 Design Requirements
MIN TYP
(1)
MAX UNIT
V
REF2
Reference voltage V
REF1
+ 0.6 2.1 5 V
EN Enable input voltage V
REF1
+ 0.6 2.1 5 V
V
REF1
Reference voltage 1.2 1.5 4.4 V
I
PASS
Pass switch current 6 mA
I
REF
Reference-transistor current 5 μA
9.2.2 Detailed Design Procedure
9.2.2.1 Bidirectional Voltage Translation
For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage),
the EN input must be connected to V
REF2
and both pins pulled to high-side V
DPU
through a pullup resistor
(typically 200 kΩ). This allows V
REF2
to regulate the EN input. A 100-pF filter capacitor connected to V
REF2
is
recommended. The I
2
C bus master output can be push-pull or open-drain (pullup resistors may be required) and
the I
2
C bus device output can be open-drain (pullup resistors are required to pull the SCL2 and SDA2 outputs to
V
DPU
). However, if either output is push-pull, data must be unidirectional or the outputs must be 3-state capable
and be controlled by some direction-control mechanism to prevent high-to-low contentions in either direction. If
both outputs are open-drain, no direction control is needed.
9.2.2.2 Sizing Pullup Resistors
To get an estimate for the range of values that can be used for the pullup resistor, please refer to the application
note SLVA689. Figure 18 and Figure 19 respectively show the maximum and minimum pullup resistance
allowable by the I
2
C specification for standard-mode (100 kHz) and fast-mode (400 kHz) operation.