pca9539 datasheet

V
CC
V
POR
V
PORF
Time
POR
Time
V
CC
Time
V
CC_GH
V
CC_GW
PCA9539
www.ti.com SCPS130G –AUGUST 2005–REVISED JUNE 2014
Glitches in the power supply can also affect the power-on reset performance of this device. The glitch width
(V
CC_GW
) and height (V
CC_GH
) are dependent on each other. The bypass capacitance, source impedance, and
device impedance are factors that affect power-on reset performance. Figure 34 and Table 8 provide more
information on how to measure these specifications.
Figure 34. Glitch Width And Glitch Height
V
POR
is critical to the power-on reset. V
POR
is the voltage level at which the reset condition is released and all the
registers and the I
2
C/SMBus state machine are initialized to their default states. The value of V
POR
differs based
on the V
CC
being lowered to or from 0. Figure 35 and Table 8 provide more details on this specification.
Figure 35. V
POR
10.2 Power-On Reset Errata
A power-on reset condition can be missed if the VCC ramps are outside specification listed above.
System Impact
If ramp conditions are outside timing allowances above, POR condition can be missed, causing the device to lock
up.
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