pca9539 datasheet

Data Output
by Transmitter
SCL From
Master
Start
Condition
S
1 2 8 9
Data Output
by Receiver
Clock Pulse for
Acknowledgment
NACK
ACK
SDA
SCL
Data Line
Stable;
Data Valid
Change
of Data
Allowed
SDA
SCL
Start Condition
S
Stop Condition
P
PCA9539
SCPS130G –AUGUST 2005–REVISED JUNE 2014 www.ti.com
Programming (continued)
Figure 19. Definition Of Start And Stop Conditions
Figure 20. Bit Transfer
Figure 21. Acknowledgment On I
2
C Bus
8.3.2 Register Map
Table 1. Interface Definition
BIT
BYTE
7 (MSB) 6 5 4 3 2 1 0 (LSB)
I
2
C slave address H H H L H A1 A0 R/W
P0x I/O data bus P07 P06 P05 P04 P03 P02 P01 P00
P1x I/O data bus P17 P16 P15 P14 P13 P12 P11 P10
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