Data Sheet
Table Of Contents
- 1.简介Brief Introduction
- 2.特点Features
- 3.应用场景Applications
- 4.应用框图Application Block Diagram
- 5.管脚定义Pinout Description
- 6.接口简介Interfaces Introduction
- 7.模组参数Module Specifications
- 8.参考设计原理图Reference Schematic
- 9.PCB设计参考PCB Design Guide
- 10.包装信息Packaging Specification
- 12. 订购信息Ordering Information
- 13. 联系信息Contact Information
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9 / 21 SKB378-DA-001,A/1
深圳市天工测控技术有限公司
Skylab M&C Technology Co., Ltd
SKB378 规格书 datasheet
6.
接口简介
Interfaces Introduction
注:以下接口,模块硬件支持,但要和技术确认是否软件支持,默认软件是串口透传,使用 UART TX PB1,
RX PB2。如果用到其他接口,请和我司 FAE 确认,必要时建议回传原理图确认。
Note:The following interfaces are supported by the module hardware, but the software support shall be
confirmed with our technology support. The default software is serial port transparent transmission,
using UART TX PB1, RX PB2. If other interfaces are used, please confirm with our FAE. If necessary, it
is recommended to send back the schematic diagram for confirmation.
6.1 数字输入输出引脚 Digital I/Os
SKB378 共有 18 个 GPIO (含 2 个 SWD 调试端口复用 GPIO:PA1_SWDCLK, PA2_SWDIO)。
SKB378 has 18 GPIOs (including 2 SWD multiplexed GPIOs: PA1_SWDCLK, PA2_SWDIO) .
每个 GPIO 引脚可单独配置为输出或输入。可为每个 GPIO 引脚配置更高级的配置,包括开漏、开源
和故障过滤。
Each GPIO pin can be individually configured as either an output or input. More advanced configurations
including open-drain, open-source, and glitch-filtering can be configured for each individual GPIO pin.
GPIO 引脚可以被外围连接覆盖,如 SPI 通信。每个外围连接都可以路由到设备上的几个 GPIO 引脚。
GPIO 引脚的输入值可以通过外围反射系统传送到其他外围设备。GPIO 子系统支持异步外部引脚中断。
The GPIO pins can be overridden by peripheral connections, like SPI communication. Each peripheral
connection can be routed to several GPIO pins on the device. The input value of a GPIO pin can be
routed through the Peripheral Reflex System to other peripherals. The GPIO subsystem supports
asynchronous external pin interrupts.
端口 A 和端口 B 上的所有引脚都支持 EM2(EM 解释见备注)。这些引脚可由 EM2/3 中的低能外围设
备使用,也可用作 EM2/3 引脚唤醒。端口 C 和 D 上的引脚在进入 EM2 时锁定/保持在其当前状态,直到
EM2 退出,内部外围设备可以再次驱动这些端口。
All of the pins on ports A and port B are EM2 capable(EM explain see note). These pins may be used
by Low-Energy peripherals in EM2/3 and may also be used as EM2/3 pin wake-ups. Pins on ports C and
D are latched/retained in their current state when entering EM2 until EM2 exit upon which internal
peripherals could once again drive those ports.
一些 GPIO 还具有 EM4 唤醒功能。这些引脚列在备用功能表中。