Specifications

XMIF Qualifier Signal Description
3-17 Memory
3.7 XMIF Qualifier Signal Description
The ’240x can address the following memory sizes in each of the external
memory spaces:
Ext. Memory Space Size (in words) Qualifier signal (strobe)
Program space
64K PS
Data space 64K DS
I/O space 64K IS
The signals that define the XMIF are given in Table 3–2.
Table 3–2. XMIF Signal Descriptions
Signal/s name Signal description
A(0:15) External 16-bit unidirectional address bus.
D(0:15) External 16-bit bidirectional data bus.
PS
Program space strobe
DS
Data space strobe
IS
I/O space strobe
STRB
External memory access strobe
WE
Write strobe
RD
Read strobe
R/W
Read / Write qualifier
MP/MC
Microprocessor/microcontroller selection pin
VIS_OE
Is active low whenever the external data bus is driving
as an output during visibility mode. Can be used by
external decode logic to prevent data bus contention
while running in visibility mode
ENA_144
If pulled low, the ’2407 device behaves like a
’2402/2404/2406; that is, has no external memory and
generates an Illegal address if any of the 3 external
spaces are accessed.
This pin has an internal pull-down resistor, so when
left disconnected, device behaves appropriately.
Note: These signals allow external memory such as SRAM to be interfaced to
the ’240x in the conventional way.
Figure 3–11 and Figure 3–12 show Visibility mode timing diagrams.