Specifications

3-1
Memory
This chapter describes the RAM, ROM, and Flash availability on the ’240x.
In addition to dual-access RAM (DARAM – B0, B1, B2), which is part of the
CPU core, the ’240x devices include flash EPROM or ROM for additional on-
chip program memory. Devices with the “LF” prefix are flash devices and de-
vices with the “LC” prefix are ROM devices.
The ’2407 has a 16-bit address bus that can access three individually select-
able spaces (192K words total):
- A 64K-word program space
- A 64K-word data space
- A 64K-word I/O space
This chapter shows memory maps for program, data, and I/O spaces. It also
describes available ’240x memory configuration options.
Topic Page
3.1 Factory Masked On-Chip ROM 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Flash 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Overview of Memory and I/O Spaces 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 Program Memory 3-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5 Data Memory 3-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.6 I/O Space 3-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.7 XMIF Qualifier Signal Description 3-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.8 Program and Data Spaces 3-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.9 I/O Space 3-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.10 Wait-State Generation 3-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3