Specifications

Glossary
D-13 Glossary
RPTC: See repeat counter (RPTC).
RS: Reset pin . When driven low, causes a reset on any ’24x device.
R/W: Read/write pin. Indicates the direction of transfer between the ’24x and
external program, data, or I/O space.
S
scratch-pad RAM: Another name for DARAM block B2 in data space
(32 words).
short-immediate value: An 8-, 9-, or 13-bit constant given as an operand
of an instruction that is using immediate addressing.
sign bit: The MSB of a value when it is seen by the CPU to indicate the sign
(negative or positive) of the value.
sign extend: Fill the unused high order bits of a register with copies of the
sign bit in that register.
sign-extension mode (SXM) bit:
Bit 10 of status register ST1; enables or
disables sign extension in the input shifter. It also differentiates between
logic and arithmetic shifts of the accumulator.
slave phase: See latch phase .
software interrupt: An interrupt caused by the execution of an INTR, NMI,
or TRAP instruction.
software stack: A program control feature that allows you to extend the
hardware stack into data memory with the PSHD and POPD instructions.
The stack can be directly stored and recovered from data memory, one
word at time. This feature is useful for deep subroutine nesting or protec-
tion against stack overflow.
ST0 and ST1: See
status registers ST0 and ST1 .
stack: A block of memory reserved for storing return addresses for subrou-
tines and interrupt service routines. The ’24x stack is 16 bits wide and
eight levels deep.
status registers ST0 and ST1: Two 16-bit registers that contain bits for
determining processor modes, addressing pointer values, and indicating
various processor conditions and arithmetic logic results. These regis-
ters can be stored into and loaded from data memory, allowing the status
of the machine to be saved and restored for subroutines.