Specifications

Glossary
D-9 Glossary
master clock output signal: See CLKOUT1 .
master phase: See logic phase .
memory-mapped register: One of the on-chip registers mapped to
addresses in data memory. See also I/O-mapped register .
microcontroller mode: A mode in which the on-chip ROM or flash memory
in program memory space is enabled. This mode is selected with the MP/
MC pin.
microprocessor mode: A mode in which the on-chip ROM or flash memory
is disabled and external program memory is enabled. This mode is se-
lected with the MP/MC
pin.
microstack (MSTACK): A register used for temporary storage of the
program counter (PC) value when an instruction needs to use the PC to
address a second operand.
MIPS: Million instructions per second.
MP/MC pin: A pin that indicates whether the processor is operating in micro-
processor mode or microcontroller mode. MP/MC high selects micropro-
cessor mode; MP/MC
low selects microcontroller mode. This pin is used
to execute the on-chip bootloader/user code at reset. When MP/MC is
held low during reset, program control transfers to on-chip non-volatile
memory at location 0000h. When MP/MC is held high, control transfers
to 0000h in external program memory.
MSB: Most significant bit. The highest order bit in a word. When used in
plural form (MSBs), refers to a specified number of high-order bits, begin-
ning with the highest order bit and counting to the right. For example, the
eight MSBs of a 16-bit value are bits 15 through 8. See also
LSB .
MSTACK: See microstack .
multiplier: A part of the CPU that performs 16-bit × 16-bit multiplication and
generates a 32-bit product. The multiplier operates using either signed
or unsigned 2s-complement arithmetic.
N
next AR: See next auxiliary register .
next auxiliary register: The register that is pointed to by the auxiliary regis-
ter pointer (ARP) when an instruction that modifies ARP is finished
executing. See also auxiliary register ; current auxiliary register .