Specifications

Glossary
D-6
F
FIFO buffer: First-in, first-out buffer. A portion of memory in which data is
stored and then retrieved in the same order in which it was stored. The
synchronous serial port has two four-word-deep FIFO buffers: one for its
transmit operation and one for its receive operation.
flash memory: Electrically erasable and programmable, nonvolatile (read-
only) memory.
G
general-purpose input/output pins: Pins that can be used to accept input
signals or send output signals. These pins are the input pin BIO, the out-
put pin XF, and the GPIO pins.
H
hardware interrupt: An interrupt triggered through physical connections
with on-chip peripherals or external devices.
I
IFR: See interrupt flag register (IFR) .
immediate addressing: One of the methods for obtaining data values used
by an instruction; the data value is a constant embedded directly into the
instruction word; data memory is not accessed.
immediate operand/immediate value: A constant given as an operand in
an instruction that is using immediate addressing.
IMR: See
interrupt mask register (IMR) .
indirect addressing: One of the methods for obtaining data values used by
an instruction. When an instruction uses indirect addressing, data
memory is addressed by the current auxiliary register. See also
direct
addressing .
input clock signal: See CLKIN .
input shifter: A 16- to 32-bit left barrel shifter that shifts incoming 16-bit data
from 0 to 16 positions left relative to the 32-bit output.