Specifications

Protocol Definitions
C-7
TMS320F240x Boot ROM Loader: Protocols and Interfacing
Figure C–3. SPI Data Packet Definition
Byte0:Byte1
Byte2:Byte3
Byte4:Byte5
Byte6:Byte7
Destination
Length (n)
Opcode 0
Opcode 1
Opcode n–1
C.2.2 SCI Asynchronous Transfer Protocol and Data Formats
The SCI-based loader operation is more involved than the SPI-based loader
operation. The SCI-based loader incorporates a mechanism for baud-rate
matching. Once the baud rate from the host is matched, the SCI loader com-
mences the transfer. Section C.2.2.1 describes the baud rate protocol.
C.2.2.1 Baud Rate Protocol
The baud rate over the communication link is always 38400 bps. The baud rate
protocol is necessary because the ’LF240x device may be operated at differ-
ent speeds. The underlying assumption for the baud rate matching is that the
device is clocked at a clock frequency from a given, predetermined set. The
host is required to send “probe” characters, with the hexadecimal value 0Dh
(same as the carriage return character). The target listens in on the serial port,
at the set speeds, in succession. Every time a character is detected, it is
compared to 0Dh. If more than three characters do not match, the target tries
a new baud rate. If the baud rate is correct and the character matches 0Dh,
then the target expects to receive nine correct characters back-to-back. If any
other character is received, the baud match fails. Once the nine characters are
received correctly, the target sends an acknowledge character. Once the ac-
knowledge character is sent, each and every character hereafter is bounced
back to the host to ensure data transfer integrity. All the communications are
with 8 bits/character, 1 stop bit, and no parity. Baud rate locks are possible at
clock speeds/CLKIN combinations listed in Table C–1. A flowchart of the baud
rate match protocol is shown in Figure C–4.