Specifications

Introduction
C-5 TMS320F240x Boot ROM Loader: Protocols and Interfacing
Figure C–2. Memory Maps for the ’LF240x Devices in Microcontroller Mode
Interrupt Vectors
DARAM (B0)
256 words
(CNF=1)
0000
003F
0040
FFFF
7FFF
FE00
8000
External
(off-chip)
87FF
8800
SARAM
2K words
(Program/Data)
Bootloader
0000
00FF
7FFF
FDFF
FF00
FEFF
Note:
DARAM (B0)
(CNF=1)
00FF
0100
32K on-chip Flash memory
(External if MP/MC
= 1)
Bootloader enabled
(BOOT_EN
/XF = 0)
Reserved
Note: When boot ROM is enabled, on-chip locations 0000–00FFh in program memory is mapped to the bootloader. Boot ROM
and Flash Memory share the same starting address, and hence, are not visible (active) at the same time. If the
BOOT_EN
/XF pin = 0 during reset, the BOOT_EN bit in SCSR2 register (bit 3) will be set and enable the Boot ROM at
0000 in program space. While Boot ROM is enabled, the entire Flash memory will be disabled. The SCSR2.3 bit should
be disabled (0) to have Flash array enabled instead of Boot ROM
. See Appendix C for bootloader details.