Specifications

Program Examples
B-35 Program Examples
LDP #EVBIMRA>>7 ; Peripheral page
SPLK #0FFFFh,EVBIFRA ; clear all EVB interrupt flags
SPLK #0FFFFh,EVBIFRB
SPLK #0FFFFh,EVBIFRC
LAR AR7,#del ; Load AR7 with delay value
MAR *,AR7 ; Set ARP to ar7
LDP #0E1h ; Peripheral page
SPLK #1111111111111111b,MCRA ; enable all EV signals
SPLK #1111111111111111b,MCRC ; enable all EV signals
*=====================================================================
* EVA Capture test
* This portion of the code tests the EVA Capture unit. It is assumed
* that the test is failed, unless an interrupt is called (error code 4)
* GISR4 verifies the values in CAPFIFO and reports the results.
* PERIPHERAL CODE : 5, TEST CODE : 1,2,3 After successful completion
* of this test case, the value 5100,5200,5300 must be present in 351h,
* 352, 353 (DM) respectively
*
* Error code: 5101 –– CAP1 value is incorrect
* 5102 –– CAP2 value is incorrect
* 5103 –– CAP3 value is incorrect
*=====================================================================
* Load EVA TIMERS registers
LDP #GPTCONA >> 7h ; Peripheral page
SPLK #0000000001001001b,GPTCONA
; 0000 0000 0
; 1 – Enable Compare o/ps
; 00 reserved
; 10 – T2 CMP active hi
; 01 – T1 CMP active lo
SPLK #0000000000000000b,T1CNT ; zero timer 1 count
SPLK #0000000000000000b,T2CNT ; zero timer 2 count
SPLK #0001011101000010b,T1CON
; 000 10 Cont, Up
; 111 x/128,
; 0 reserved for T1,Tenable select
; 1 Tenable for Timer 1
; 00 Internal clk
; 00 cntr =0
; 1 enable compare
; 0 use own period register
SPLK #0001011111000011b,T2CON
; TSWT1=1: Use Timer 1 tenable bit
; SELT1PR=1: Use Timer 1 period
; register
SPLK #1111111111111111b,T1PR
SPLK #0011111100000000b,T1CMPR
SPLK #0011111100000000b,T2CMPR
SPLK #0000000000000000b,EVAIMRA
SPLK #0000000000000000b,EVAIMRB
; disable group A,B interrupts