Specifications

Program Examples
B-34
;===========================================================================
* File name : CAP.asm *
* Description : PROGRAM TO CHECK THE CAPTURE UNITS OF ’240X *
* This program checks the Capture units of EVA & EVB. On each EV module, *
* the capture units are setup to detect different transitions. On EVA, *
* CAP1 detects a rising edge, CAP2 detects a falling edge and CAP3 detects *
* both edges. All capture interrupts are enabled. Timers 1 & 2 provide *
* input signals (through external connections) and also serve as a *
* time–base for these capture units. Upon detection, the capture interrupt *
* reads the proper CAPFIFO value to ensure that the capture units detected *
* the correct transition. The same scheme is implemented on EVB, to check *
* CAP4,5 and 6 using Timers 3 and 4. *
;===========================================================================
* Both Timers count in CONTINUOUS–UP mode.
* CAP1 is rising edge detect (T1 CMP Active low) *
* CAP2 is falling edge detect (T1 CMP Active low) *
* CAP3 on both edges (T2 CMP Active high) *
* This program tests the following in EVA :– *
* CAP1 & CAP2 using Timer 1 *
* CAP3 using Timer 2 *
* This program tests the following in EVB :– *
* CAP4 & CAP5 using Timer 3 *
* CAP6 using Timer 4 *
* COMMENTS: Connect T1CMP to CAP1,2; T2CMP to CAP3 inputs *
* Connect T3CMP to CAP4,5; T4CMP to CAP6 inputs *
* PERIPHERAL CODE : 5 (EVA) and 6 (EVB) *
* TEST CODE : CAP 1,2,3,4,5,6 – 1,2,3,1,2,3 respectively *
.title ” EV capture test” ; Title
.include ”240x.h” ; Variable and register declaration
.include ”vector.h” ; Vector label declaration
del .set 0fffh ; define delay
.text
START: LDP #0h ; set DP=0
SETC INTM ; Disable interrupts
SPLK #0000h,IMR ; Mask all core interrupts
LACC IFR ; Read Interrupt flags
SACL IFR ; Clear all interrupt flags
LDP #WDKEY >> 7h ; Peripheral page
SPLK #006Fh, WDCR ; Disable WD if VCCP=5V
LDP #SCSR1>>7
SPLK #000Ch,SCSR1 ; EVA & EVB modules clock enable
LDP #EVAIMRA>>7 ; Peripheral page
SPLK #0FFFFh,EVAIFRA ; clear all EVA interrupt flags
SPLK #0FFFFh,EVAIFRB
SPLK #0FFFFh,EVAIFRC