Specifications

Program Examples
B-32
SPLK #0000011110000000b,EVAIFRA
; clear interrupts
LDP #0
SPLK #0000000000000010b,IMR ; Enable INT2
CLRC INTM
wait: NOP ; main loop
NOP
B wait
GISR2: NOP ; Int2 GISR
LDP #PIVR >> 7h ; Peripheral page
LACL PIVR ; PIVR value
XOR #002ah ; T1 overflow
BCND SISR2a,eq
LACL PIVR
XOR #0029h ; T1 underflow
BCND SISR29,eq
LACL PIVR
XOR #0028h ; T1 Compare
BCND SISR28,eq
LACL PIVR
XOR #0027h ; T1 Period
BCND SISR27,eq
RET
SISR2a:
LDP #0E1h ; Peripheral page
SPLK #0FF01h,PBDATDIR ; Set IOPB0
CALL DELAY
LDP #GPTCONA >> 7h ; Peripheral page
LACC #0400h ; clear overflow int. flag
SACL EVAIFRA ; in EVAIFRA
CLRC INTM ; Enable all interrupts
RET
SISR29:
LDP #0E1h ; Peripheral page
SPLK #0FF02h,PBDATDIR ; Set IOPB1
CALL DELAY
LDP #GPTCONA >> 7h ; Peripheral page
LACC #0200h ; clear underflow int. flag
SACL EVAIFRA ; in EVAIFRA
CLRC INTM ; Enable all interrupts
RET
SISR28:
LDP #0E1h ; Peripheral page
SPLK #0FF04h,PBDATDIR ; Set IOPB2
CALL DELAY
LDP #GPTCONA >> 7h ; Peripheral page
LACC #0100h ; clear compare int. flag
SACL EVAIFRA ; in EVAIFRA
CLRC INTM ; Enable all interrupts