Specifications

Program Examples
B-31 Program Examples
;=========================================================================
* File name : EV_T1INT.asm *
* Description : PROGRAM TO CHECK THE OPERATION OF TIMER1 IN EVA *
* Mode: Continous Up/Down counting, x/128 *
* Output: OF,UF,CMPR & PERIOD interrupts that toggles IOPB0,1,2,3 *
;=========================================================================
.title ” EV test routine” ; Title
.include ”240x.h” ; Variable and register declaration
.include vector.h ; Vector label declaration
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
; M A C R O – Definitions
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
KICK_DOG .macro ;Watchdog reset macro
LDP #00E0h ;DP––>7000h–707Fh
SPLK #05555h, WDKEY
SPLK #0AAAAh, WDKEY
LDP #0h ;DP––>0000h–007Fh
.endm
.text
START: LDP #0h ; set DP=0
SETC INTM ; Disable interrupts
SPLK #0000h,IMR ; Mask all core interrupts
LACC IFR ; Read Interrupt flags
SACL IFR ; Clear all interrupt flags
LDP #WDKEY >> 7h ; Peripheral page
SPLK #0004h,SCSR1 ; EVA module clock enable
SPLK #006Fh, WDCR ; Disable WD
KICK_DOG
MAR *,AR0
LDP #0E1h ; Peripheral page
SPLK #1111111100000000b,PBDATDIR
; set IOPBn as outputs,0
* Load TIMER 1 registers
LDP #GPTCONA >> 7h ; Peripheral page
SPLK #0000000000000000b,GPTCONA
SPLK #0000000000000000b,T1CNT ; zero timer 1 count
SPLK #0000111101000010b,T1CON
;000 01 Cont, Up/Down
;111 x/128
;01 Tenable reserved for T1
;00 Internal clk
;00 LD CMPR whencntr =0
;1 enable compare
;0 use own period register
SPLK #1111111111111111b,T1PR
SPLK #0000000011111111b,T1CMPR
SPLK #0000011110000000b,EVAIMRA
; Enable OV,U,C,P interrupt bits