Specifications

Interrupt Priority and Vectors
2-11 System Configuration and Interrupts
Table 2–2. ’240x Interrupt Source Priority and Vectors (Continued)
(e) INT5 (level 5)
Overall
Priority
Interrupt
Name
CPU
Interrupt
Vector
Peripheral
Interrupt
Vector
Maskable?
Source
Peripheral
Description
27 SPIINT INT5
000Ah
0005h Y SPI SPI interrupt
(low priority)
28 RXINT INT5
000Ah
0006h Y SCI SCI receiver interrupt
(low-priority mode)
29 TXINT INT5
000Ah
0007h Y SCI SCI transmitter interrupt
(low-priority mode)
30 CANMBINT INT5
000Ah
0040h Y CAN CAN mailbox interrupt
(low-priority mode)
31 CANERINT INT5
000Ah
0041h Y CAN CAN error interrupt
(low-priority mode)
(f) INT6 (level 6)
Overall
Priority
Interrupt
Name
CPU
Interrupt
Vector
Peripheral
Interrupt
Vector
Maskable?
Source
Peripheral
Description
32 ADCINT INT6
000Ch
0004h Y ADC ADC interrupt
(low priority)
33 XINT1 INT6
000Ch
0001h Y External
interrupt logic
External interrupt pins
(low-priority mode)
34 XINT2 INT6
000Ch
0011h Y External
interrupt logic
External interrupt pins
(low-priority mode)
Reserved 000Eh N/A Y CPU Analysis interrupt
N/A TRAP 0022h N/A N/A CPU TRAP instruction
N/A
Phantom
Interrupt
Vector
N/A 0000h N/A CPU Phantom interrupt
vector
Note: Shaded interrupts are new interrupts added to ’240x by virtue of EVB.