Specifications

Program Examples
B-24
; bit 12 Change configuration request
W_CCE BIT CANGSR,#0Bh ; Wait for Change config Enable
BCND W_CCE,NTC
SPLK #0000000000000000b,CANBCR2
; ||||||||||||||||
; FEDCBA9876543210
; bit 0–7 Baud rate prescaler
; bit 8–15 Reserved
SPLK #0000010101010111b,CANBCR1
; ||||||||||||||||
; FEDCBA9876543210
; bit 0–2 TSEG1
; bit 3–6 TSEG2
; bit 7 Sample point setting (1: 3 times, 0: once)
; bit 8–A Synchronization jump width
; bit B Synchronization on falling edge
; bit C–F Reserved
SPLK #0000000000000000b,CANMCR
; ||||||||||||||||
; FEDCBA9876543210
; bit 12 Change configuration request
;
W_NCCE BIT CANGSR,#0Bh ; Wait for Change config disable
BCND W_NCCE,TC
W_ERROR LACL CANESR ; Check errors
BCND W_ERROR,NEQ
LOOP B LOOP ; Wait for Receive Interrupt
;==================================================================
; ISR used to copy MBX2 RAM when an interrupt is received
;==================================================================
GISR5:
LOOP_READ MAR *,AR2
LACL *+,AR0 ; Copy MBX2 contents in Accumulator
SACL *+,AR1 ; Copy MBX2 contents in B0
BANZ LOOP_READ ; Copy all 4 words
LDP #7h ; Write A000 at 3A0h in B1 memory
SPLK #0A000h,020h ; if this ISR is executed once.
CLRC INTM
RET