Specifications

Summary of Programmable Registers on the ’240x
A-5 Programmable Register Address Summary
Table A–1. Summary of Programmable Registers on the ’240x (Continued)
Data Memory
Address
PageData PageRegister Name
Register
Mnemonic
710Bh LAM0_H Local Acceptance Mask
(MBOX 0 and MBOX 1)
E2h (226) 10-17
710Ch LAM0_L Local Acceptance Mask
(MBOX 0 and MBOX 1)
E2h (226) 10-17
710Dh LAM1_H Local Acceptance Mask
(MBOX 2 and MBOX 3)
E2h (226) 10-17
710Eh LAM1_L Local Acceptance Mask
(MBOX 2 and MBOX 3)
E2h (226) 10-17
7200h MSGID0L CAN Message ID for Mailbox 0
(lower 16 bits)
E4h (228) 10-11
7201h MSGID0H CAN Message ID for Mailbox 0
(upper 16 bits)
E4h (228) 10-10
7202h MSGCTRL0 MBOX 0 RTR and DLC E4h (228) 10-11
7204h MBOX0A CAN 2 of 8 bytes of Mailbox 0 E4h (228) –
7205h MBOX0B CAN 2 of 8 bytes of Mailbox 0 E4h (228) –
7206h MBOX0C CAN 2 of 8 bytes of Mailbox 0 E4h (228) –
7207h MBOX0D CAN 2 of 8 bytes of Mailbox 0 E4h (228) –
7208h MSGID1L CAN Message ID for mailbox 1
(lower 16 bits)
E4h (228) 10-11
7209h MSGID1H CAN Message ID for mailbox 1
(upper 16 bits)
E4h (228) 10-10
720Ah MSGCTRL1 MBOX 1 RTR and DLC E4h (228) 10-11
720Ch MBOX1A CAN 2 of 8 bytes of Mailbox 1 E4h (228) –
720Dh MBOX1B CAN 2 of 8 bytes of Mailbox 1 E4h (228) –
720Eh MBOX1C CAN 2 of 8 bytes of Mailbox 1 E4h (228) –
720Fh MBOX1D CAN 2 of 8 bytes of Mailbox 1 E4h (228) –
7210h MSGID2L CAN Message ID for mailbox 2
(lower 16 bits)
E4h (228) 10-11
7211h MSGID2H CAN Message ID for mailbox 2
(upper 16 bits)
E4h (228) 10-10
7212h MSGCTRL2 MBOX 2 RTR and DLC E4h (228) 10-11
7214h MBOX2A CAN 2 of 8 bytes of Mailbox 2 E4h (228) –
7215h MBOX2B CAN 2 of 8 bytes of Mailbox 2 E4h (228) –
7216h MBOX2C CAN 2 of 8 bytes of Mailbox 2 E4h (228) –
7217h
MBOX2D CAN 2 of 8 bytes of Mailbox 2 E4h (228) –