Specifications

Flash Program Memory
13-13 ’24x–’240x Family Compatibility
0101 CMPCT (Compaction mode). Set up charge pump and Flash
core for compaction operation. Set this mode to start a compac-
tion operation that pulls over-erased bits out of depletion. The
CMPCT mode must be set prior to the access that sets the
PMPC EXECUTE bit, by the delay defined in the Flash module
specification.
0110 CMPCTVER (Compaction verify mode). This is used to test for
bits erased into depletion. This sets up the charge pump and
Flash core for the depletion test. The CMPCTVER mode must
be set prior to the access that sets the PMPC EXECUTE bit, by
the delay defined in the Flash module specification.
0111 RDMRGN0 (Read Margin 0 mode). This is used to verify margin
of programmed bits. This sets up the charge pump and Flash
core for verification. The sense voltage is raised to verify the
margin of 0’s in the array. It is similar to program verify, but the
voltage is not raised as much. The RDMRGN0 mode must be
set prior to the access that sets the PMPC EXECUTE bit, by the
delay defined in the Flash module specification.
1000 RDMRGN1 (Read Margin 1 mode). This is used to verify margin
of erased bits. This sets up the charge pump and Flash core for
verification. The sense voltage is lowered to verify the margin of
1’s in the array. It is similar to erase verify, but the voltage is not
lowered as much. The RDMRGN1 mode must be set prior to the
access that sets the PMPC EXECUTE bit, by the delay defined
in the Flash module specification.
1001 to
1111
Reserved.
13.4.2.3 Test Control Register
Figure 13–5. Test Control Register
15–8
Reserved
R-x
7–3 2 1 0
Reserved
TCR
Enable
Standby
CNTL
Enable
R-x R-x R-x R-x
Note: R = Read access, x = undefined