Specifications

Flash Program Memory
13-12
Bits 15–10 Reserved
Bit 9 WSVER En. Verification wait-state enable
When active high, this bit enables the automatic generation of a wait state on
all verification reads (ERASEVER, PROGVER, CMPCTVER, RDMRGN1,
RDMRGN0) by pulling OREADY low for one cycle. When inactive low, verifica-
tion reads will have zero wait states.
Bit 8 PRECND Mode1
Bit 7 PRECND Mode0
Bit 6 ENG/R Mode2
Bit 5 ENG/R Mode1
Bit 4 ENG/R Mode0
Bits 3–0 FCM3–FCM0. Flash Control mode bits 3–0
These four bits select which mode of operation the Flash module is in.
0000 Normal mode (Read mode)
0001 ERASE (Erase mode). Set up charge pump and Flash core for
an erase. Set this mode to start the erase operation. The
ERASE mode must be set prior to the access that sets the
PMPC EXECUTE bit, by the delay defined in the Flash module
specification.
0010 ERASEVER (Erase verify mode). This is used to verify proper
erasure. This sets up the charge pump and Flash core for veri-
fication. The sense voltage is lowered to verify the margin of 1’s
in the array. The ERASEVER mode must be set prior to the ac-
cess that sets the PMPC EXECUTE bit, by the delay defined in
the Flash module specification.
0011 PROG (Program mode). Set up charge pump and Flash core for
programming operation. Set this mode to start the write opera-
tion. The PROG mode must be set prior to the access that sets
the PMPC EXECUTE bit, by the delay defined in the Flash mod-
ule specification.
0100 PROGVER (Program verify mode). This is used to verify proper
programming. This sets up the charge pump and Flash core for
verification. The sense voltage is raised to verify the margin of
0’s in the array. The PROGVER mode must be set prior to the
access that sets the PMPC EXECUTE bit, by the delay defined
in the Flash module specification.