Specifications

Configuration Registers
2-6
Bit 3 Boot Enable
This bit reflects the state of the BOOT_EN / XF pin at the time of reset. After
reset and device has “Booted up”, this bit can be changed in software to
re-enable Flash memory visibility, or return to active Boot ROM.
0 Enable Boot ROM — Address space 0000 — 00FF is now occu-
pied by the on-chip Boot ROM Block. Flash memory is totally dis-
abled in this mode.
Note: There is no on-chip boot ROM in ROM (i.e., “LC”240x)
devices.
1 Disable Boot ROM — Program address space 0000 — 7FFF is
mapped to on-chip Flash Memory, in case of ’LF2407 and ’LF2406.
In case of ’LF2402, addresses 0000 – 1FFF are mapped.
Bit 2 Microprocessor / Microcontroller Select
This bit reflects the state of the MP/MC
pin at time of reset. After reset this bit
can be changed in software to allow dynamic mapping of memory on and off
chip.
0 Set to Microcontroller mode — Program Address range 0000 —
7FFF is mapped internally (i.e. Flash or ROM)
1 Set to Microprocessor mode — Program Address range 0000 —
7FFF is mapped externally (i.e. Customer provides external
memory device.)
Note: MP/MC
pin is available only in ’LF2407.
Bits 1–0 SARAM Program / Data Space Select
DON PON SARAM status
0 0 SARAM not mapped (disabled), address space allocated
to external memory.
0 1 SARAM mapped internally to Program space
1 0 SARAM mapped internally to Data space
1 1 SARAM block mapped internally to both Data and Pro-
gram spaces. This is the default or reset value.
Note: See memory map for location of SARAM addresses