Specifications

Control Registers
11-5 Watchdog (WD) Timer
11.2.2 Operation of WD Timers
The WD timer is an 8-bit resetable incrementing counter that is clocked by the
output of the prescaler. The timer protects against system software failures
and CPU disruption by providing a system reset when the WDKEY register is
not serviced before a watchdog overflow. This reset returns the system to a
known starting point. Software then clears the WDCNTR register by writing a
correct data pattern to the WD key logic.
A separate internal clocking signal (WDCLK) is generated by the on-chip clock
module and is active in all operational modes except the HALT mode. WDCLK
enables the WD timer to function, regardless of the state of any register bit(s)
on the chip, except during the HALT low-power mode, which disables the
WDCLK signal. The current state of WDCNTR can be read at any time during
its operation.
11.2.3 WD Prescale Select
The 8-bit WDCNTR can be clocked directly by the WDCLK signal or through
one of six taps from the free-running counter. The 6-bit free-running counter
continuously increments at a rate provided by WDCLK. The WD functions are
enabled as long as WDCLK is provided to the module. Any one of the six taps
(or the direct input from WDCLK) can be selected by the WD prescale select
(bits WDPS2–0) as the input to the time base for the WDCNTR. This prescale
provides selectable watchdog overflow rates of from 4.36 ms to 279.6 ms for
a WDCLK rate of 58593.8 Hz. While the chip is in normal operation mode, the
free-running counter cannot be stopped or reset, except by a system reset.
Clearing WDCNTR does not clear the free-running counter.
11.2.4 Servicing the WD Timer
The WDCNTR is reset when the proper sequence is written to the WDKEY be-
fore the WDCNTR overflows. The WDCNTR is enabled to be reset when a val-
ue of 55h is written to the WDKEY. When the next AAh value is written to the
WDKEY, then the WDCNTR actually is reset. Any value written to the WDKEY
other than 55h or AAh causes a system reset. Any sequence of 55h and AAh
values can be written to the WDKEY without causing a system reset; only a
write of 55h followed by a write of AAh to the WDKEY resets the WDCNTR.