Specifications

Power-Down Mode (PDM)
10-37 CAN Controller Module
10.8 Power-Down Mode (PDM)
If the peripheral clocks are to be shut off by the device low-power mode, the
CAN peripheral’s own low-power mode must be requested before a device
low-power mode is entered by executing the IDLE instruction.
Before the CPU enters its IDLE mode prior to the device low-power mode that
potentially shuts off all device clocks, it must first request a CAN peripheral
power down by writing a 1 to the PDR bit in MCR. If the module is transmitting
a message when PDR is set, the transmission is continued until a successful
transmission, a lost arbitration, or an error condition on the CAN bus line oc-
curs. Then the PDA is asserted. Thus, the module causes no error condition
on the CAN bus line. When the module is ready to enter the power-down mode,
the status bit PDA is set. The CPU must then poll the PDA bit in GSR, and only
enter IDLE after PDA is set.
On exiting the power-down mode, the PDR flag in the MCR must be cleared
by software, or automatically, if the WUBA bit in MCR is set and there is bus
activity on the CAN bus line. When detecting a dominant signal on the CAN
bus, the wake-up interrupt flag (WUIF) is asserted. The power-down mode is
exited as soon as the clock is switched on. There is no internal filtering for the
CAN bus line.
The automatic wake-up on bus activity can be enabled or disabled by setting
the configuration bit WUBA. If there is any activity on the CAN bus line, the
module begins its power up sequence. The module waits until detecting
11 consecutive recessive bits on the RX pin and goes to bus active afterwards.
The first message, which initiates the bus activity,
cannot be received.
When WUBA is enabled, the error interrupt WUIF is asserted automatically to
the PIE controller, which will handle it as a wake-up interrupt and restart the
device clocks if they are stopped.
After leaving the sleep mode with a wake up, the PDR and PDA are cleared.
The CAN error counters remain unchanged.