Specifications

CAN Control Registers
10-18
10.4 CAN Control Registers
The control register bits allow mailbox functions to be manipulated. Each
register performs a specific function, such as enabling or disabling the
mailbox, controlling the transmit/receive mail function, and handling interrupts.
10.4.1 Mailbox Direction/Enable Register (MDER)
The Mailbox Direction/Enable register (MDER) consists of the Mailbox Enable
(ME) and the Mailbox Direction (MD). In addition to enabling/disabling the
mailboxes, MDER is used to select the direction (transmit/receive) for mail-
boxes 2 and 3. Mailboxes that are disabled may be used as additional memory
for the DSP. Figure 10–11 illustrates this register.
Figure 10–11. Mailbox Direction/Enable Register (MDER) — Address 7100h
15–8
Reserved
76543210
MD3
MD2 ME5 ME4 ME3 ME2 ME1 ME0
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
Note: R = Read access; W = Write access; value following dash (–) = value after reset
Bits 15–8 Reserved.
Bits 7–6 MDn. Mailbox direction for mailbox n. Mailboxes 2 and 3 can be configured as
a transmit or receive mailbox.
Mailbox direction bits are defined as follows:
0 Transmit mailbox
1 Receive mailbox
After power-up, all bits are cleared.
Bits 5–0 MEn. Mailbox-enable for mailbox n. Each mailbox can be enabled or disabled.
If the bit MEn is 0, the corresponding mailbox n is disabled. The mailbox must
be disabled before writing to any identifier field.
If the corresponding bit in ME is set, the write access to the identifier of a mes-
sage object is denied and the mailbox is enabled for the CAN module.
Mailboxes that are disabled may be used as additional memory for the DSP.