Specifications

Message Objects
10-17 CAN Controller Module
reception, mailboxes 3 and 2 are checked before mailboxes 1 and 0.
Figure 10–9 illustrates the LAMn_H high word and Figure 10–10 illustrates the
LAMn_L low word.
Figure 10–9. Local Acceptance Mask Register n (0, 1) High Word (LAMn_H)
15 14–13 12–0
LAMI
Reserved LAMn[28:16]
RW-0 RW-0
Note: R = Read access; W = Write access; value following dash (–) = value after reset
Bit 15 LAMI. Local acceptance mask identifier extension bit.
0 The identifier extension bit stored in the mailbox determines which
messages are received (standard or extended).
1 Standard and extended frames can be received. In case of an ex-
tended frame, all 29 bits of the identifier are stored in the mailbox
and all 29 bits of the global acceptance mask register are used for
the filter. In case of a standard frame, only the first eleven bits (bits
12–2 of LAMn_H) of the identifier and the local acceptance mask
are used.
Bits 14–13 Reserved.
Bits 12–0 LAMn[28:16]. Upper 13 bits of the local acceptance mask.
0 Received identifier bit value must match the identifier bit of the re-
ceive mailbox. For example, if bit 27 of LAM is zero, then bit 27 of
the transmitted MSGID and bit 27 of the receive mailbox MSGID
must be the same.
1 Accept a 0 or a 1 (
don’t care ) for the corresponding bit of the re-
ceive identifier.
Figure 10–10. Local Acceptance Mask Register n (0, 1) Low Word (LAMn_L)
15–0
LAMn[15:0]
RW-0
Note: R = Read access; W = Write access; value following dash (–) = value after reset
Bits 15–0 LAMn[15:0]. Lower part of the local acceptance mask. These bits enable the
masking of any identifier bit of an incoming message.
0 Received identifier bit value must match the identifier bit of the
receive mailbox.
1 Accept a 0 or a 1 (don’t care) for the corresponding bit of the
receive identifier.