Specifications

Message Objects
10-10
- CRC: contains a 16-bit checksum calculated on most parts of the mes-
sage. This checksum is used for error detection.
- ACK: Data Acknowledge
- EOF: End of Frame
10.3.1 Mailbox Layout
1) Mailbox RAM:
The mailbox RAM is the area where the CAN frames are stored before they are
transmitted, and after they are received. Each mailbox has four 16-bit registers
which can store a maximum of 8 bytes (MBOXnA, MBOXnB, MBOXnC, and
MBOXnD). Mailboxes that are not used for storing messages may be used as
normal memory by the CPU.
2) Message Identifiers:
Each one of the six mailboxes has its own message identifier stored in two
16-bit registers. Figure 10–5 shows the message identifier high word and
Figure 10–6 shows the message identifier low word.
Figure 10–5. Message Identifier for High Word Mailboxes 0–5 (MSGIDnH)
15 14 13 12–0
IDE
AME AAM IDH[28:16]
RW RW RW RW
Note: R = Read access; W = Write access
Bit 15 IDE. Identifier Extension Bit
0 The received message has a standard identifier (11 bits).
†
The message to be sent has a standard identifier (11 bits).
‡
1 The received message has an extended identifier (29 bits).
†
The message to be sent has an extended identifier (29 bits).
‡
†
In case of a receive mailbox
‡
In case of a transmit mailbox
Bit 14 AME. Acceptance Mask Enable Bit
0 No acceptance mask will be used. All identifier bits in the received
message and the receive MBOX must match in order to store the
message.
1 The corresponding acceptance mask is used.
This bit will not be affected by a reception.
This bit is relevant for receive mailboxes only. Hence, it is applicable for
MBOX0 and MBOX1 and also for MBOX2 and MBOX3, if they are configured
as receive mailboxes. It is a don’t care for mailboxes 4 and 5.