Specifications

SPI Control Registers
9-17 Serial Peripheral Interface (SPI)
9.5 SPI Control Registers
The SPI is controlled and accessed through registers in the control register file.
Figure 9–6 lists the SPI control registers and bit numbers.
Figure 9–6. SPI Control Registers
Addr
Register
Bit number
Addr.
Register
Name
15–8
7 6 5 4 3 2 1 0
7040h SPICCR –
SPI SW
RESET
CLOCK
POLARITY
–
SPI
CHAR3
SPI
CHAR2
SPI
CHAR1
SPI
CHAR0
7041h SPICTL – –
OVER-
RUN
INT
ENA
CLOCK
PHASE
MASTER/
SLAVE
TALK
SPI INT
ENA
7042h SPISTS –
RECEIVER
OVERRUN
SPI INT
FLAG
TX
BUF
FULL
–
7043h – – –
7044h SPIBRR – –
SPI BIT
RATE 6
SPI BIT
RATE 5
SPI BIT
RATE 4
SPI BIT
RATE 3
SPI BIT
RATE 2
SPI BIT
RATE 1
SPI BIT
RATE 0
7045h – – –
7046h SPIRXEMU
ERXB
15–8
ERXB7 ERXB6 ERXB5 ERXB4 ERXB3 ERXB2 ERXB1 ERXB0
7047h SPIRXBUF
RXB
15–8
RXB7 RXB6 RXB5 RXB4 RXB3 RXB2 RXB1 RXB0
7048h SPITXBUF
TXB
15–8
TXB7 TXB6 TXB5 TXB4 TXB3 TXB2 TXB1 TXB0
7049h SPIDAT
SDAT
15–8
SDAT7 SDAT6 SDAT5 SDAT4 SDAT3 SDAT2 SDAT1 SDAT0
704Ah – – –
704Bh – – –
704Ch – – –
704Dh – – –
704Eh – – –
704Fh SPIPRI – –
SPI
PRIORITY
SPI
SUSP
SOFT
SPI
SUSP
FREE
–
– Reserved