Specifications

SPI Interrupts
9-15 Serial Peripheral Interface (SPI)
9.4.10 Proper SPI Initialization Using the SPI SW RESET Bit
To prevent unwanted and unforeseen events from occurring during or as a re-
sult of initialization changes, clear the SPI SW RESET bit (SPICCR.7) before
making initialization changes, and then set this bit after initialization is com-
plete.
Do not change SPI configuration when communication is in
progress.
9.4.11 Data Transfer Example
The timing diagram, shown in Figure 9–5, illustrates an SPI data transfer be-
tween two devices using a character length of five bits with the SPICLK being
symmetrical.
The timing diagram with SPICLK unsymmetrical (Figure 9–4) shares similar
characterizations with Figure 9–5 except that the data transfer is one CLKOUT
cycle longer per bit during the low pulse (CLOCK POLARITY = 0) or during the
high pulse (CLOCK POLARITY = 1) of the SPICLK.
Figure 9–5, Five Bits per Character, is applicable for 8-bit SPI only and is not
for ‘24x devices that are capable of working with 16-bit data. The figure is
shown for illustrative purposes only.