Specifications

SPI Operation
9-8
- If there is valid data in the transmit buffer SPITXBUF, as indicated by the
TXBUF FULL bit in SPISTS, this data is transferred to SPIDAT and is
transmitted; otherwise, SPICLK stops after all bits have been shifted out
of SPIDAT.
- If the SPI_INT_ENA bit (SPICTL.0) is set to 1, an interrupt is asserted.
In a typical application, the SPISTE pin could serve as a chip enable pin for
slave SPI devices. (Drive this slave select pin low before transmitting master
data to the slave device, and drive this pin high again after transmitting the
master data.)
Slave Mode
In the slave mode (MASTER/SLAVE = 0), data shifts out on the SPISOMI pin
and in on the SPISIMO pin. The SPICLK pin is used as the input for the serial
shift clock, which is supplied from the external network master. The transfer
rate is defined by this clock. The SPICLK input frequency should be no greater
than the CLKOUT frequency divided by 4.
Data written to SPIDAT or SPITXBUF is transmitted to the network when ap-
propriate edges of the SPICLK signal are received from the network master.
Data written to the SPITXBUF register will be transferred to the SPIDAT regis-
ter when all bits of the character to be transmitted have been shifted out of SPI-
DAT. If no character is currently being transmitted when SPITXBUF is written
to, the data will be transferred immediately to SPIDAT. To receive data, the SPI
waits for the network master to send the SPICLK signal and then shifts the data
on the SPISIMO pin into SPIDAT. If data is to be transmitted by the slave simul-
taneously, and SPITXBUF has not been previously loaded, the data must be
written to SPITXBUF or SPIDAT before the beginning of the SPICLK signal.
When the TALK bit (SPICTL.1) is cleared, data transmission is disabled, and
the output line (SPISOMI) is put into the high-impedance state. If this occurs
while a transmission is active the current character is completely transmitted
even though SPISOMI is forced into the high-impedance state. This ensures
that the SPI is still able to receive incomming data correctly. ThisTALK bit al-
lows many slave devices to be tied together on the network, but only one slave
at a time is allowed to drive the SPISOMI line.
The SPISTE
pin operates as the slave select pin. An active-low signal on the
SPISTE pin allows the slave SPI to transfer data to the serial data line; an inac-
tive high signal causes the slave SPI’s serial shift register to stop and its serial
output pin to be put into the high-impedance state. This allows many slave de-
vices to be tied together on the network, although only one slave device is se-
lected at a time.