Specifications

SPI Operation
9-6
9.3 SPI Operation
This section describes the operation of the SPI. Included are explanations of
the operation modes, interrupts, data format, clock sources, and initialization.
Typical timing diagrams for data transfers are given.
9.3.1 Introduction to Operation
Figure 9–2 shows typical connections of the SPI for communications between
two controllers: a master and a slave.
The master initiates data transfer by sending the SPICLK signal. For both the
slave and the master, data is shifted out of the shift registers on one edge of
the SPICLK and latched into the shift register on the opposite SPICLK clock
edge. If the CLOCK PHASE bit (SPICTL.3) is high, data is transmitted and re-
ceived a half-cycle before the SPICLK transition (see section 9.3.2,
SPI Mod-
ule Slave and Master Operation Modes , on page 9-7). As a result, both con-
trollers send and receive data simultaneously. The application software deter-
mines whether the data is meaningful or dummy data. There are three possible
methods for data transmission:
- Master sends data; slave sends dummy data.
- Master sends data; slave sends data.
- Master sends dummy data; slave sends data.
The master can initiate data transfer at any time because it controls the
SPICLK signal. The software, however, determines how the master detects
when the slave is ready to broadcast data.