Specifications

Differences vs. ’C240 SPI
9-3 Serial Peripheral Interface (SPI)
- State control logic
- Memory-mapped control and status registers
The basic function of the strobe (SPISTE) pin is to act as a transmit enable in-
put for the SPI module in slave mode. It stops the shift register so it cannot re-
ceive data and puts the SPISOMI pin in the high-impedance state.
Figure 9–1. SPI Module Block Diagram
SPI INT FLAG
S
S
CLOCK
POLARITY
TALK
CLKOUT
456
012
SPI BIT RATE
State control
SPIRXBUF
buffer register
CLOCK
PHASE
1230
Receiver
overrun
SPICTL.4
Overrun
INT ENA
SPICCR.3–0
SPIBRR.6– 0
SPICCR.6
SPICTL.3
SPIRXBUF.15–0
SPIDAT.15–0
SPICTL.1
M
S
M
MASTER/SLAVE
†
SPICTL.0
SPI INT
ENA
SPISTS.7
SPISTS.6
M
S
SPICTL.2
SPI CHAR
External
connections
SPISIMO
SPISOMI
SPISTE}
SPICLK
SW2
S
M
M
S
SW3
SPIPRI.6
SPI PRIORITY
High INT priority
Low INT priority
1
0
M
SW1
{
16
SPITXBUF.15–0
SPIDAT
data register
16
SPITXBUF
buffer register
3
M
S
V
CC
SPI interrupt
to CPU
†
The diagram is shown in slave mode.
‡
The SPISTE
pin is shown as being enabled, meaning the data can be transmitted or received in this mode. Note that switches
SW1, SW2, and SW3 are closed in this configuration. The “switches” are assumed to close when their “control signal” is high.