Specifications

SCI Module Registers
8-29 Serial Communications Interface (SCI)
Bit 1 RXWAKE. Receiver wakeup-detect flag.
A value of 1 in this bit indicates detection of a receiver wakeup condition. In
the address bit multiprocessor mode (SCICCR.3 = 1), RXWAKE reflects the
value of the address bit for the character contained in SCIRXBUF. In the idle-
line multiprocessor mode, RXWAKE is set if the SCIRXD data line is detected
as idle. RXWAKE is a read-only flag, cleared by one of the following:
- the transfer of the first byte after the address byte to SCIRXBUF
- the reading of SCIRXBUF
- an active SW RESET
- a system reset
Bit 0 Reserved. Reads return zero; writes have no effect.
Figure 8–16. Register SCIRXST Bit Associations — Address 7055h
76543210
RX ERROR
RXRDY BRKDT FE OE PE RXWAKE Reserved
RX ERROR = 1 when any of bits 5 through 2 is a 1 value
RXRDY or BRKDT causes an interrupt
if RX/BK INT ENA (SCICTL2.1) = 1
8.6.6 Receiver Data Buffer Registers
Received data is transferred from RXSHF to the SCIRXEMU and SCIRXBUF
registers. When the transfer is complete, the RXRDY flag (bit SCIRXST.6) is
set, indicating that the received data is ready to be read. Both registers contain
the same data; they have separate addresses but are not physically separate
buffers. The only difference is that reading SCIRXEMU
does not clear the
RXRDY flag; however, reading SCIRXBUF clears the flag.
8.6.6.1 Emulation Data Buffer
Normal SCI data receive operations read the data received from the SCIRX-
BUF register (described below). The SCIRXEMU register is used principally
by the emulator (EMU) because it can continuously read the data received for
screen updates without clearing
the RXRDY flag. SCIRXEMU is cleared by a
system reset.
This is the register which should be used in an Emulator watch window to view
the contents of SCIRXBUF register.