Specifications

SCI Module Registers
8-19 Serial Communications Interface (SCI)
8.6 SCI Module Registers
The functions of the SCI are software configurable. Sets of control bits, orga-
nized into dedicated bytes, are programmed to initialize the desired SCI com-
munications format. This includes operating mode and protocol, baud value,
character length, even/odd parity or no parity, number of stop bits, and inter-
rupt priorities and enables. The SCI is controlled and accessed through regis-
ters listed in Figure 8–9, and described in the sections that follow.
Figure 8–9. SCI Control Registers
Address
Register
Bit Number
Register
Address
Register
mnemonic
7 6 5 4 3 2 1 0
Register
name
7050h SCICCR
STOP
BITS
EVEN/
ODD
PARITY
PARITY
ENABLE
LOOP
BACK
ENA
ADDR/
IDLE
MODE
SCI
CHAR2
SCI
CHAR1
SCI
CHAR0
Commu-
nication
control
7051h SCICTL1 Reserved
RX ERR
INT ENA
SW
RESET
Reserved TXWAKE SLEEP TXENA RXENA
SCI control
reg.1
7052h SCIHBAUD
BAUD15
(MSB)
BAUD14 BAUD13 BAUD12 BAUD11 BAUD10 BAUD9 BAUD8
Baud rate
(MSbyte)
7053h SCILBAUD BAUD7 BAUD6 BAUD5 BAUD4 BAUD3 BAUD2 BAUD1
BAUD0
(LSB)
Baud rate
(LSbyte)
7054h SCICTL2 TXRDY
TX
EMPTY
Reserved
RX/BK
INTENA
TX
INTENA
SCI control
reg.2
7055h SCIRXST
RX
ERROR
RXRDY BRKDT FE OE PE RXWAKE Reserved
Receiver
status
7056h SCIRXEMU ERXDT7 ERXDT6 ERXDT5 ERXDT4 ERXDT3 ERXDT2 ERXDT1 ERXDT0
EMU data
buffer
7057h SCIRXBUF RXDT7 RXDT6 RXDT5 RXDT4 RXDT3 RXDT2 RXDT1 RXDT0
Receiver
data buffer
7058h ––– Reserved –––
7059h SCITXBUF TXDT7 TXDT7 TXDT5 TXDT4 TXDT3 TXDT2 TXDT1 TXDT0
Transmit
data buffer
705Ah ––– Reserved –––
705Bh ––– Reserved –––
705Ch ––– Reserved –––
705Dh ––– Reserved –––
705Eh ––– Reserved –––
705Fh SCIPRI Reserved
SCITX
PRIORITY
SCIRX
PRIORITY
SCI
SUSP
SOFT
SCI
SUSP
FREE
Reserved
Priority/
emulation
control